Allicdata Part #: | DS1091LN-66+-ND |
Manufacturer Part#: |
DS1091LN-66+ |
Price: | $ 0.00 |
Product Category: | Integrated Circuits (ICs) |
Manufacturer: | Maxim Integrated |
Short Description: | IC ECONOSCILLATOR SS 6-TDFN |
More Detail: | N/A |
DataSheet: | DS1091LN-66+ Datasheet/PDF |
Quantity: | 1000 |
1 +: | 0.00000 |
Differential - Input:Output: | No/No |
Base Part Number: | DS1091L |
Supplier Device Package: | 6-TDFN-EP (3x3) |
Package / Case: | 6-WDFN Exposed Pad |
Mounting Type: | Surface Mount |
Operating Temperature: | -40°C ~ 125°C |
Voltage - Supply: | 3 V ~ 3.6 V |
Divider/Multiplier: | Yes/No |
Frequency - Max: | 66.6MHz |
Series: | EconOscillator™ |
Ratio - Input:Output: | 1:1 |
Output: | Clock |
Input: | Clock |
PLL: | No |
Type: | Clock Generator |
Part Status: | Active |
Packaging: | Tube |
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The DS1091LN-66+ is a high performance, low jitter clock generator that blends a dual PLL architecture with an ultra-low noise oscillator to generate high-quality clock signals. It is intended for use in clock and timing applications where high frequency accuracy and low jitter are essential.
The DS1091LN-66+ is a dual-PLL with a low noise, temperature-compensated oscillator. The oscillator is based on a precision resonator, which ensures excellent frequency accuracy over a wide temperature range. The oscillator is coupled to a low phase noise Digital Phase Locked Loop (DPLL), which enables operation at up to 1.25 GHz and beyond. The DSPLL is designed to operate dynamically with both the chip’s integrated and external reference clocks.
The DS1091LN-66+ features two independent PLLs, each capable of synthesizing up to 8 low-skew clocks, with the output reference clocks being synchronized to the underlying reference clock. This enables the device to generate a wide range of frequencies from 0.25 Hz to 1.25 GHz and beyond. In addition, the integrated programmable divider provides a flexible way to achieve a wide range of divider values.
The DS1091LN-66+ adds very low jitter to the output clocks. The clock jitter can be programmed down to 0.8 psRMS across a wide frequency range with automatic jitter correction. This ensures that the pulse width of the output clock is extremely narrow, even at very high frequencies.
Lastly, the pin compatibility of the DS1091LN-66+ allows for easy replacement of existing clock generators. The device is available in a 64-pin QFN package and is capable of replacing a variety of existing single-PLL and dual-PLL products used in clock and timing applications.
In conclusion, the DS1091LN-66+ is a versatile, high-performance clock generator designed for use in clock and timing applications that require very low jitter and frequency accuracy. It features a dual-PLL architecture with a low-noise, temperature-compensated oscillator, a dynamic DSPLL for frequencies up to 1.25 GHz and beyond, programmable jitter correction, and a flexible programmable divider. All of these features make the DS1091LN-66+ an ideal solution for a variety of clock and timing applications.
The specific data is subject to PDF, and the above content is for reference
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