Allicdata Part #: | DS1100U-500+-ND |
Manufacturer Part#: |
DS1100U-500+ |
Price: | $ 4.18 |
Product Category: | Integrated Circuits (ICs) |
Manufacturer: | Maxim Integrated |
Short Description: | IC DELAY LINE 5TAP 500NS 8UMAX |
More Detail: | Delay Line IC Nonprogrammable 5 Tap 500ns 8-TSSOP,... |
DataSheet: | DS1100U-500+ Datasheet/PDF |
Quantity: | 160 |
1 +: | $ 3.79890 |
10 +: | $ 3.60927 |
25 +: | $ 2.97360 |
50 +: | $ 2.82492 |
250 +: | $ 2.73516 |
1000 +: | $ 2.39492 |
Series: | -- |
Packaging: | Tube |
Part Status: | Active |
Number of Taps/Steps: | 5 |
Function: | Nonprogrammable |
Delay to 1st Tap: | 100ns |
Tap Increment: | 100ns |
Available Total Delays: | 500ns |
Number of Independent Delays: | 1 |
Voltage - Supply: | 4.75 V ~ 5.25 V |
Operating Temperature: | -40°C ~ 85°C |
Mounting Type: | Surface Mount |
Package / Case: | 8-TSSOP, 8-MSOP (0.118", 3.00mm Width) |
Supplier Device Package: | 8-uMAX |
Base Part Number: | DS1100 |
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The DS1100U-500+ is a precision voltage-controlled delay line (VCDL) chip from National Semiconductor. It is an all-in-one simple delay line solution for precision timing and frequency control applications.
The DS1100U-500+ is a monolithic device that provides integrated delay calibration, buffering, and clock recovery functions. It operates from a single external clock and provides adjustable delays from 5 to 2000 nanoseconds in 10 nanosecond (ns) increments. The dynamic control range of the delay line is adjustable from 0 to 255 tenths of a nanosecond (10th of an ns). These features make the DS1100U-500+ well suited for many applications requiring precision timing accuracy and frequency control.
For most applications, the DS1100U-500+ is used to delay a clock signal without affecting its shape or frequency. By adjusting the amount of delay desired, it can be used to synchronize multiple clock signals or to phase align multiple signals with different frequencies. It can also be used to control the output frequency of a clock, or to generate a delay modulated signal.
The DS1100U-500+ is based on a Voltage Controlled Delay Line (VCDL) topology. A VCDL is an active delay line circuit in which the delay can be adjusted by changing the voltage applied to the delay line. The delay line is composed of a transmission line with a series array of variable capacitors. By varying the voltage on the variable capacitance elements, either mechanically or electronically, the characteristic impedance of the line is varied and the delay of the line is adjusted.
The DS1100U-500+ also incorporates a control logic for calibration and control of the delay line. This calibration logic ensures that the specified delay is set accurately, thus providing the desired delay control feature. The DS1100U-500+ also provides two separate synchronization inputs that allow two different clocks to be connected to the device. Inputs can range from 3.3V to 10.6V.
The DS1100U-500+ is well suited for a wide variety of applications. It is ideal for clock synchronization, frequency control, die-to-die synchronization, periodic signal missing and pulse-width-modulation applications. It can also be used in precision timing applications where it is important to maintain a precise delay between two signals. It’s low power consumption and wide dynamic range make this device a great choice for many different types of timing applications.
In conclusion, the DS1100U-500+ is a highly versatile, single chip delay line solution for precision timing and frequency control applications. It offers a uniform delay range, adjustable from 0 to 255 tenths of a nanosecond, and provides two separate clock synchronization inputs. The device also incorporates calibration logic for adjusting the delay to the desired amount. In addition, its low power consumption, small size and wide dynamic range make it suitable for numerous timing applications.
The specific data is subject to PDF, and the above content is for reference
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