LMH2191TME/NOPB Integrated Circuits (ICs)

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The LMH2191TME/NOPB is a low-power, low-distortion, high-speed Clock driver with the ability to drive different transmission lines. It has low power consumption, high versatility, and easy integration with other products. The device is excellent for driving various clock signals, including PCIe, SDR, DDR, and LVDS. This device also has a high equalization capability and is ideal for applications where longer twisted pair wires with limited power/ground connections are needed.

Application Field

The LMH2191TME/NOPB family of clock drivers is designed for clocking today’s high-speed data communication systems and networks. The device is suitable for clock synchronization, PCI Express and other high-speed serial bus clock distribution applications. It can supply 8 differential output clocks in LVDS, SSTL, and HCSL formats. It is compatible with the latest, high-frequency backplanes and cables. It is also suitable for driving long links of telecom, backplane and cable transmission links.

Working Principle

The LMH2191TME/NOPB device provides a high-speed low-distortion clock output driver. It is based on a special architecture that enables it to develop higher speed signals from a given clock period. By implementing automatic equalization and a fully differential architecture, it minimizes jitter and provides excellent clock skewing and wide frequency range performance from 70MHz to 500MHz. The device comprises a single-ended to differential conversion, an internal low jitter PLL, and an output buffer. The input signal is fed through a single-ended to differential conversion stage which converts the single ended signal to two differential signals and feeds them to the input of the PLL-based automatic equalization block. The PLL then locks to the incoming signal and produces a clock signal with higher speed than that of the input signal. This clock signal is then fed to the output buffers, and the output buffers drive the clock signal to the output terminals.

The device features an internal damping circuit which reduces channel to channel skew and EMI radiation. The output drivers are designed for low distortion and low jitter at speeds up to 500MHz. The device also has fault detect, fault control, and power control features. It can also be configured to operate in two different modes, normal and high speed. The normal mode is designed for low power, while the high speed mode is designed for higher speed applications.

The LMH2191TME/NOPB combines the rich features of a PLL-based clock driver, to lock onto and drive multiple, long-distance, high-speed clocking links in a wide range of conditions. This makes it ideal for clocking high speed communication systems and networks.

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