
Allicdata Part #: | 568-4322-ND |
Manufacturer Part#: |
LPC2387FBD100,551 |
Price: | $ 9.90 |
Product Category: | Integrated Circuits (ICs) |
Manufacturer: | NXP USA Inc |
Short Description: | IC MCU 32BIT 512KB FLASH 100LQFPARM7® LPC2300 Micr... |
More Detail: | N/A |
DataSheet: | ![]() |
Quantity: | 2074 |
1 +: | $ 8.99640 |
10 +: | $ 8.26938 |
100 +: | $ 6.98393 |
500 +: | $ 6.21272 |
1000 +: | $ 5.69856 |
Series: | LPC2300 |
Packaging: | Tray |
Part Status: | Active |
Applications: | -- |
Core Processor: | ARM7® |
Core Size: | 16/32-Bit |
Speed: | 72MHz |
Connectivity: | CANbus, Ethernet, I²C, Microwire, Memory Card, SPI, SSI, SSP, UART/USART, USB OTG |
Controller Series: | -- |
Peripherals: | Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT |
Number of I/O: | 70 |
Interface: | CAN, I2C, I2S, SSP, UART, USB |
Program Memory Size: | 512KB (512K x 8) |
Program Memory Type: | FLASH |
Voltage - Supply: | 3V ~ 3.6V |
EEPROM Size: | -- |
Mounting Type: | Surface Mount |
RAM Size: | 98K x 8 |
Voltage - Supply (Vcc/Vdd): | 3 V ~ 3.6 V |
Data Converters: | A/D 6x10b; D/A 1x10b |
Oscillator Type: | Internal |
Operating Temperature: | -40°C ~ 85°C (TA) |
Package / Case: | 100-LQFP |
Supplier Device Package: | 100-LQFP (14x14) |
Base Part Number: | LPC2387 |
Due to market price fluctuations, if you need to purchase or consult the price. You can contact us or emial to us: sales@allicdata.com
Full model: LPC2387FBD100,551
Manufacturer: NXP Semiconductors
Core architecture: ARM7TDMI-S (32-bit RISC processor)
Package: LQFP-100 (14×14mm)
Operating voltage: 3.0V ~ 3.6V (single power supply)
Operating temperature: -40°C ~ +85°C (industrial grade)
Marking: ",551" indicates industrial grade lead-free package
CPU frequency: 72 MHz (maximum)
On-chip memory: 512KB Flash + 98KB SRAM (including 64KB USB dedicated RAM)
External bus interface: supports 8/16/32-bit memory expansion (maximum address space 16MB)
Communication interface: USB 2.0 full speed, 4x UART, 2x CAN 2.0B, 3x SPI/SSP, 2x I²C
Analog peripherals: 10-bit ADC (8 channels, 400ksps), 10-bit DAC
Timers: 6x (including 4x 32-bit timers)
GPIO number: 70 (5V tolerant input)
Description
The LPC2387 microcontroller is based on a 16-bit/32-bit ARM7TDMI-S CPU with real-time emulation that combines the microcontroller with 512 kB of embedded high-speed flash memory. A 128-bit wide memory interface and a unique accelerator architecture enable 32-bit code execution at the maximum clock rate. For critical performance in interrupt service routines and DSP algorithms, this increases performance up to 30 % over Thumb mode. For critical code size applications, the alternative 16-bit Thumb mode reduces code by more than 30 % with minimal performance penalty. The LPC2387 is ideal for multi-purpose serial communication applications. It incorporates a 10/100 Ethernet Media Access Controller (MAC), USB full speed device with 4 kB of endpoint RAM, four UARTs, two CAN channels, an SPI interface, two Synchronous Serial Ports (SSP), three I2C interfaces, and an I2S interface. This blend of serial communications interfaces combined with an on-chip 4 MHz internal oscillator, 64 kB SRAM, 16 kB SRAM for Ethernet, 16 kB SRAM for USB and general purpose use, together with 2 kB battery powered SRAM makes this device very well suited for communication gateways and protocol converters. Various 32-bit timers, an improved 10-bit ADC, 10-bit DAC, one PWM unit, a CAN control unit, and up to 70 fast GPIO lines with up to 12 edge or level sensitive external interrupt pins make this microcontroller particularly suitable for industrial control and medical systems.
Features
1. ARM7TDMI-S processor, running at up to 72 MHz.
2. 512 kB on-chip flash program memory with In-System Programming (ISP) and In-Application Programming (IAP) capabilities. Flash program memory is on the ARM local bus for high performance CPU access.
3. 64 kB of SRAM on the ARM local bus for high performance CPU access.
4. 16 kB SRAM for Ethernet interface. Can also be used as general purpose SRAM.
5. 16 kB SRAM for general purpose DMA use; also accessible by the USB.
6. Dual Advanced High-performance Bus (AHB) system that provides for simultaneous Ethernet DMA, USB DMA, and program execution from on-chip flash with no contention between those functions. A bus bridge allows the Ethernet DMA to access the other AHB subsystem.
7. Advanced Vectored Interrupt Controller (VIC), supporting up to 32 vectored interrupts.
8. General Purpose DMA (GPDMA) on AHB controller that can be used with the SSP serial interfaces, the I2S port, and the Secure Digital/MultiMediaCard (SD/MMC) card port, as well as for memory-to-memory transfers.
9. Serial interfaces:
- Ethernet MAC with associated DMA controller. These functions reside on an independent AHB.
- USB 2.0 device/host/OTG with on-chip PHY and associated DMA controller.
- Four UARTs with fractional baud rate generation, one with modem control I/O, one with IrDA support, all with FIFO.
- CAN controller with two channels.
- SPI controller.
- Two SSP controllers, with FIFO and multi-protocol capabilities. One is an alternate for the SPI port, sharing its interrupt and pins. These can be used with the GPDMA controller.
- Three I2C-bus interfaces (one with open-drain and two with standard port pins).
- I2S (Inter-IC Sound) interface for digital audio input or output. It can be used with the GPDMA.
10. Other peripherals:
- SD/MMC memory card interface.
- 70 general purpose I/O pins with configurable pull-up/down resistors.
- 10-bit ADC with input multiplexing among 6 pins.
- 10-bit DAC.
- Four general purpose timers/counters with a total of 8 capture inputs and 10 compare outputs. Each timer block has an external count input.
- One PWM/timer block with support for three-phase motor control. The PWM has two external count inputs.
- Real-Time Clock (RTC) with separate power pin, clock source can be the RTC oscillator or the APB clock.
- 2 kB SRAM powered from the RTC power pin, allowing data to be stored when the rest of the chip is powered off.
- WatchDog Timer (WDT). The WDT can be clocked from the internal RC oscillator, the RTC oscillator, or the APB clock.
11. Standard ARM test/debug interface, compatible with existing tools.
12. Emulation trace module supports real-time trace.
13. Single 3.3 V power supply (3.0 V to 3.6 V).
14. Four low-power modes: Idle, Sleep, Power-down, and Deep Power-down.
15. Four external interrupt inputs configurable as edge/level triggered. All pins on Port 0 and Port 2 can be used as edge-triggered interrupt sources.
16. The processor can wake up from Power-down mode by any interrupt that is operable in Power-down mode, including external interrupts, RTC interrupts, USB activity, Ethernet wake-up interrupts.
17. Two independent power domains allow power consumption to be fine-tuned based on required functionality.
18. Each peripheral has its own clock divider for further power savings.
19. Brown-out detect with independent interrupt and forced reset thresholds.
20. On-chip power-on reset.
21. On-chip crystal oscillator operating from 1 MHz to 25 MHz.
22. 4 MHz internal RC oscillator with 1% accuracy, optionally used as system clock. CAN and USB interfaces will not operate when used as CPU clock.
23. On-chip PLL allows CPU to run at maximum CPU rate without high frequency crystal. Can run from main oscillator, internal RC oscillator or RTC oscillator.
24. Flexible pin function selection, providing more possibilities for using on-chip peripheral functions.
Pin function (LQFP-100 key pins)
Pin number | Name | Function |
12-19 | P0.0-P0.7 | GPIO/external interrupt/Ethernet MII interface |
44-51 | P1.16-P1.23 | GPIO/USB connection indication/CAN transceiver control |
71 | RESET | Low level active reset input |
89-92 | P2.5-P2.8 | I²C/UART multiplexed pins |
100 | VBAT | RTC and backup register power supply (1.8V~3.6V) |
Application areas
1. Industrial control
2. Medical systems
3. Protocol converters
4. Communications
Development support
1. Tool chain: Keil MDK, IAR Embedded Workbench
2. Debug interface: JTAG/SWD (via standard 20-pin connector)
3. Evaluation board: LPC2300 series development kit (with Ethernet and CAN interfaces)
Design considerations
1. Power management:
- Independently filtered 3.3V (AVDD pin) is required for the analog part (ADC/DAC)
- The VBAT pin must be connected to a backup power supply to keep the RTC running
2. PCB layout:
- High-frequency signal lines (such as USB differential pairs) need to be 50Ω impedance controlled
- It is recommended to use a 4-layer board with separate digital/analog ground planes
The specific data is subject to PDF, and the above content is for reference
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