MAX11617EEE+

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Data acquisition plays an important role in many industrial and commercial applications, allowing machines and equipments to measure, interpret and analyze the data which can be utilized to solve specific problems and make proper decisions. As such, the Analog to Digital Converters (ADC) are important tools utilized to convert analog signals into digital representations. In this article, we will focus on the MAX11617EEE+ application field and working principle.

The MAX11617EEE+ is a wide bandwidth four channel simultaneous sampling successive approximate register (SAR) analog-to-digital converter (ADC). This device combines a low-power, low noise CMOS- SAR analog input stage with a high-resolution, monotonic conversion function. Its wide bandwidth and high-resolution allows the device to measure small amplitude analog signals in dynamic applications such as power detectors, strain gauge transducers and sonic sensor applications. This device features four low-noise channels, the sampling rate can be programmed with the external clock from 200ksps to 400ksps, and the input range of ±VREF or ±2VREF. The MAX11617EEE+ also features an internal reference with 12-bit resolution.

The working principle of the MAX11617EEE+ is quite simple and consists of two main phases. First, the device has an analog input stage which consists of a low-noise differential amplifier, precision tolerance resistors and buffered multiplexers. This stage buffers the input signals, converts them to a common-mode voltage and then multiplexes them. Second, the ADC stage which samples and digitizes the signals. This stage utilizes a SAR architecture which measures an analog input voltage and then compares it with a reference voltage. The main components of an SAR architecture include a comparator, a DAC, a clock, and a counter. The comparator compares the reference voltage with the input voltage and the DAC modifies the digital word to form the digital conversion. The feedback loop of the SAR converter works until the reference voltage matches the input voltage. The total conversion time is equivalent to the total number of clock cycles. During this period the digital outputs represent the analog input values.

Furthermore, the MAX11617EEE+ offers a wide range of features and benefits. It is designed to minimize the main sources of error such as 1/f noise, glitches, and power supply variations. This device is also capable of automatic offset and gain calibration which allows it to achieve greater accuracy and reduce calibration time. In addition, the MAX11617EEE+ also features a wide supply voltage range from 2.7 V to 5.5 V, low power consumption and a low-input impedance, making it suitable for battery-powered systems.

To summarize, the MAX11617EEE+ is a four channel simultaneous sampling successive approximate register (SAR) analog-to-digital converter (ADC) with wide bandwidth, low-power and low noise CMOS-SAR analog input stage. This device features a wide supply voltage range from 2.7 V to 5.5 V, and a sampling rate which can be programmed with the external clock from 200ksps to 400ksps. Also it automatically reduces 1/f noise and glitches and offers an internal reference with 12-bit resolution. These features make it suitable for dynamic applications such as power detectors, strain gauge transducers and sonic sensor applications.

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