| Allicdata Part #: | MC100E137FNR2G-ND |
| Manufacturer Part#: |
MC100E137FNR2G |
| Price: | $ 0.00 |
| Product Category: | Integrated Circuits (ICs) |
| Manufacturer: | ON Semiconductor |
| Short Description: | IC RIPPLE COUNTER 8BIT HS 28PLCC |
| More Detail: | Counter IC Binary Counter 1 Element 8 Bit Positive... |
| DataSheet: | MC100E137FNR2G Datasheet/PDF |
| Quantity: | 1000 |
| 1 +: | 0.00000 |
| Timing: | -- |
| Base Part Number: | 100E137 |
| Supplier Device Package: | 28-PLCC (11.51x11.51) |
| Package / Case: | 28-LCC (J-Lead) |
| Mounting Type: | Surface Mount |
| Operating Temperature: | 0°C ~ 85°C |
| Voltage - Supply: | 4.2V ~ 5.5V |
| Trigger Type: | Positive, Negative |
| Count Rate: | 2.2GHz |
| Series: | 100E |
| Reset: | Asynchronous |
| Number of Bits per Element: | 8 |
| Number of Elements: | 1 |
| Direction: | Up |
| Logic Type: | Binary Counter |
| Part Status: | Obsolete |
| Packaging: | Tape & Reel (TR) |
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The MC100E137FNR2G is a low-power, non-inverting dual modulo 16 presettable counter. It is a high performance 2.5V-3.3V CMOS device and is available in a 16 lead Small Outline Integrated Circuit package. It has two separate 16-bit counters and is used in both synchronous and asynchronous applications. The device is also suitable for use in high speed digital logic applications such as radix converters, canonical logic applications, and instruction control.
The MC100E137FNR2G is ideal for applications such as clocking data, signal frequency division, and signal gating. The counter can be operated in synchronous mode, where both the signal and reset inputs are enabled simultaneously, or in asynchronous mode, where signal input is only enabled. The device is also capable of operating in single cycle (synchronous) or two-cycle (asynchronous) mode.
In terms of application fields, the MC100E137FNR2G can be used in a variety of applications. It is commonly used in the design and manufacture of general-purpose logic, memory devices, and data processing devices such as radix conversion and instruction control. It is also used in digital signal processing (DSP) applications such as frequency division and signal gating, and in digital automotive test instruments.
The working principle of the MC100E137FNR2G is quite simple. It is a two-stage synchronous, presettable counter. The two-stage shift-register count consists of two 16-bit counter cells, each with a preset value. A signal input is used to increment each counter cell by one each time the signal input is enabled. The preset values can be set using an asynchronous reset signal. By combining the signal and reset inputs, the counters can be operated in either synchronous or asynchronous mode.
The internal architectures of the MC100E137FNR2G have been designed to provide high speed and low power operation. The counter includes an internal prescaler, an internal system clock and a reset control register. The internal prescaler divides the system clock frequency by 8, thus allowing the counter to operate at a higher clock frequency than the system clock indicates. The reset control register is responsible for resetting the count value to a desired value.
The MC100E137FNR2G is a high performance low-power CMOS device and is well-suited for a variety of applications that require low power, high-speed and where power dissipation is a primary consideration. It can be used in applications such as clocking data, signal frequency division, signal gating and general-purpose logic, memory and data processing applications. The device is also suitable for automotive test instruments and other digital applications.
The specific data is subject to PDF, and the above content is for reference
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MC100E137FNR2G Datasheet/PDF