PCA9846PWJ

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1. Describe

The PCA9846 is an ultra-low voltage, quad bidirectional transfer switch controlled via the I2C bus. The SCL/SDA upstream pair fans out to four downstream pairs or channels. Any or all SCx/SDx channels can be selected, as determined by the programmable control registers. This feature allows multiple devices with the same I2C bus address to reside on the same bus. Switching devices can also separate the heavily loaded I2C bus into separate bus segments, eliminating the need for bus buffers. An active low reset input allows the PCA9846 to recover from one of these conditions The downstream I2C bus is stuck in a low state. Pulling the RESET pin low resets the I2C bus state machine and deselects all channels, as does the internal power-on reset (POR) function. The switch's transmission gate is constructed so that the VDD1 pin is used to limit the maximum high voltage that the PCA9846 passes through. This allows different bus voltages to be used on each channel so that 0.8 V, 1.8 V, 2.5 V or 3.3 V parts can communicate without any additional protection. External pull-up resistors pull the bus up to the desired voltage level for each channel. All I/O pins are 3.6 V tolerant.

2. Feature

    1. Ultra-low voltage operation, down to 0.8 V, to interface with next-generation CPUs

    2. 1-of-4 bidirectional transfer switch

    3. Fm+ I2C-bus interface logic; compatible with SMBus standard

    4. Active low reset input

    5. 2 address pins, allowing up to 16 devices on the I2C bus

    6. Channel selection via I2C bus

    7. Power up with all switch channels deselected

    8. Low Ron switch

    9. Allows voltage level translation between 0.8 V, 1.8 V, 2.5 V, and 3.3 V buses

  10. Reset by I2C bus software command

  11. I2C device ID function

  12. Power on without fault

  13. Supports hot-insertion, deselect all channels at power-on

  14. Low standby current

  15. 3.6 V tolerant input

  16. 0 Hz to 1 MHz clock frequency

  17. ESD protection over 6000 V HBM (per JESD22-A114) and 1000 V CDM (per JESD22-C101)

  18. Latch-up tested according to JEDEC standard JESD78 over 100 mA

  19. Available in two packages: TSSOP16 and HVQFN16

3. Pin configuration

4. Pin Description

5. Characteristics of the I2C bus

The PCA9846 is an I2C slave device. Data is exchanged between host and host The PCA9846 complies with the I2C bus protocol for write and read commands. the two of them The communication lines are SCL (serial clock) and SDA (serial data), both of which must be connected to VDD1 through pull-up resistors.