S9S08QD4J1CSCR

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1. Describe

The S9S08QD4J1CSCR series of MCUs is a member of the low-cost, high-performance HCS08 family of 8-bit microcontroller units (MCUs). All MCUs in this family use the enhanced HCS08 core and are available in various modules, memory sizes, memory types and package types.

2. 8-bit HCS08 central processing unit (CPU)

    1. 16 MHz HCS08 CPU (Central Processing Unit)

    2. HC08 instruction set adds BGND instruction

    3. Background debugging system

    4. Breakpoint feature that allows a single breakpoint to be set during in-circuit debugging (plus two breakpoints in the on-chip debug module)

    5. Supports up to 32 interrupt/reset sources

3. Memory

    1. Flash read/program/erase over full operating voltage and temperature range

    2. Flash size:

        - MC9S08QD4/S9S08QD4: 4096 bytes

        - MC9S08QD2/S9S08QD2: 2048 bytes

    3. memory size

        - MC9S08QD4/S9S08QD4: 256 bytes

        - MC9S08QD2/S9S08QD2: 128 bytes

4. system protection

    1. Watchdog computer operating properly (COP) reset, optionally running from dedicated 32 kHz internal clock source or bus clock

    2. Low voltage detection with reset or interrupt

    3. Illegal opcode detection with reset

    4. Illegal address detection with reset

    5. Flash block protection

5. Peripherals

    1. ADC – 4-channel, 10-bit analog-to-digital converter with auto-compare, asynchronous clock source, temperature sensor, and internal bandgap reference channel. The ADC can be hardware triggered using the RTI counter.

    2. TIM1 — 2-channel timer/pulse-width modulator; each channel can be used for input capture, output compare, buffered edge-aligned PWM, or buffered center-aligned PWM

    3. TIM2 — 1-channel timer/pulse-width modulator; each channel can be used for input capture, output compare, buffered edge-aligned PWM, or buffered center-aligned PWM

    4. KBI — 4-pin keyboard interrupt module, software selectable polarity for edge or edge/level mode

6. Input Output

    1. Four general-purpose input/output (I/O) pins, one input-only pin, and one output-only pin. 10 mA per output, 60 mA maximum in package.

    2. Software selectable pull-up on port when used as input

    3. Software selectable slew rate control and port drive strength when used as output

    4. Internal pull-up resistors on RESET and IRQ pins reduce customer system cost

7. Pin Control Registers

To select drive strength or enable slew rate control or pullup devices, the user writes to the appropriate pin control register located in the high-page register block of the memory map. The pin control registers operate independently of the parallel I/O registers and allow control of a port on an individual pin basis.