Allicdata Part #: | SI5315A-C-GM-ND |
Manufacturer Part#: |
SI5315A-C-GM |
Price: | $ 0.00 |
Product Category: | Integrated Circuits (ICs) |
Manufacturer: | Silicon Labs |
Short Description: | IC CLK MULT 8KHZ-644.53MHZ 36QFN |
More Detail: | N/A |
DataSheet: | SI5315A-C-GM Datasheet/PDF |
Quantity: | 740 |
Ratio - Input:Output: | 2:2 |
Base Part Number: | SI5315 |
Supplier Device Package: | 36-QFN (6x6) |
Package / Case: | 36-VFQFN Exposed Pad |
Mounting Type: | Surface Mount |
Operating Temperature: | -40°C ~ 85°C |
Voltage - Supply: | 1.71 V ~ 3.63 V |
Frequency - Max: | 644.53MHz |
Differential - Input:Output: | Yes/Yes |
Series: | DSPLL® |
Number of Circuits: | 1 |
Output: | CML, CMOS, LVDS, LVPECL |
Input: | CML, CMOS, LVDS, LVPECL |
Main Purpose: | Ethernet, SONET/SDH/PDH, Telecom |
PLL: | No |
Part Status: | Active |
Packaging: | Tray |
Due to market price fluctuations, if you need to purchase or consult the price. You can contact us or emial to us: sales@allicdata.com
The SI5315A-C-GM is a high-performance, programmable clock generator in a tiny 3 x 3 mm package, designed to reduce system cost and simplify board layout. It is designed with a dual-loop architecture, offering fifteen outputs which combine to produce flexible clock distribution.
The clock generator is targeted at consumer, office automation and industrial applications, where it is often called upon to generate multiple clocks with different frequencies and jitter requirements. It is also very useful in cutting-edge applications like wireless communications, multimedia and automotive design.
In terms of application field, the SI5315A-C-GM is particularly suitable for microprocessor/microcontroller-orientated systems. These systems require a large number of different frequencies and often need very precise clock synchronization. Examples of use cases include the generation of frequency multiplication, the conversion from Ethernet to USB, and the conversion from PCIe to channel-link.
In terms of working principle, the SI5315A-C-GM has a dual-loop, fractional-N/programmable-delay PLL architecture, which is capable of generating up to fifteen multiple frequencies with tight jitter and skew specifications. All of the output frequencies are programmed in the main loop, while the delay and skew of four of the output frequencies are programmable in the delay loop.
The SI5315A-C-GM helps to minimize board space and maintains a high performance, reliable clock. Its programmability and very low-power consumption when compared to other solutions make it the perfect choice for a wide range of applications.
The SI5315A-C-GM has proven itself as an important and versatile tool in the clock and timing industry. Its combination of low power consumption, flexibility and precision make it an ideal solution for applications where multiple frequencies need to be generated and synchronized with high accuracy.
The specific data is subject to PDF, and the above content is for reference
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