SI5335D-B06056-GMR Allicdata Electronics
Allicdata Part #:

SI5335D-B06056-GMR-ND

Manufacturer Part#:

SI5335D-B06056-GMR

Price: $ 2.65
Product Category:

Integrated Circuits (ICs)

Manufacturer: Silicon Labs
Short Description: 4-OUTPUT, ANY FREQUENCY( ...
More Detail: N/A
DataSheet: SI5335D-B06056-GMR datasheetSI5335D-B06056-GMR Datasheet/PDF
Quantity: 1000
2500 +: $ 2.40624
Stock 1000Can Ship Immediately
$ 2.65
Specifications
Series: *
Packaging: Tape & Reel (TR) 
Part Status: Active
Mounting Type: Surface Mount
Package / Case: 24-VFQFN Exposed Pad
Supplier Device Package: 24-QFN (4x4)
Description

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The SI5335D-B06056-GMR is a high performance, low cost, three-output Phase Locked Loop (PLL) based clock generator. It is typically used in modern clock and timing applications such as embedded networking, cellular systems and digital broadcast. The device offers three output clocks compliant with IEEE 1588, PTP v2, ITU-T G.8272, G.8273, and G.8264, as well as providing a user programmable spread spectrum frequency reference.

The SI5335D-B06056-GMR is designed to generate a wide variety of clock signals and provide high accuracy, low jitter clocks. The device can generate output clock frequencies from 10 MHz to 250 MHz and can be used to generate multiple low-phase-noise frequencies simultaneously. The device utilizes a PLL architecture which enables locking to a reference clock or spreading the jitter of an input reference clock. This feature makes the device well-suited for end applications where no costly external crystal or oscillator needs to be used.

The core of the SI5335D-B06056-GMR is a low noise PLL circuit supported by high performance digital logic. A synthesizer is included which generates a reference clock from an external oscillator. The synthesizer uses a high resolution Digital-to-Analog Converter (DAC) to generate a low jitter reference clock frequency that is locked to the clock reference frequency. The reference clock is buffered and then fed to the DLL which generates four output clocks. The output clocks can be either synchronous or asynchronous to the input clock, and can be spread filtered by a user programmable spread spectrum clock.

The SI5335D-B06056-GMR provides an IntelliPhase phase-locked loop (PLL) circuit which enables phase-locking of the output clock with the input reference clock. This feature eliminates the need for an external crystal or oscillator. The device’s IntelliPhase inputs are also capable of synchronizing the device to an asynchronous frequency source, such as a reference clock. The output clock is low-phase-noise and can be tailored to suit the specific requirements of the application.

The device provides three output clocks, each of which can be programmed to either synchronized or asynchronous to the reference clock. Additionally, the spread spectrum clock is capable of individual frequency control as well as control of the peak to valley amplitude across the entire output frequency range. This feature provides greater control of the output frequency. The device also includes an internal voltage regulator for supplying the device with a stable supply voltage.

The SI5335D-B06056-GMR is an ideal solution for applications that require both low-phase-noise and low jitter clocks. The IntelliPhase architecture eliminates the need for an external crystal or oscillator. The device provides outputs up to 250 MHz and can generate up to three frequencies simultaneously. The device also includes a programmable spread spectrum clock, allowing users to adjust the peak to valley amplitude of the output frequency, as well as the ability to synchronize the output clock to an asynchronous frequency source such as a reference clock.

The specific data is subject to PDF, and the above content is for reference

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