SI5355A-B01700-GMR

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Introduction

SI5355A-B01700-GMR is a pre-compliance Frequency Synthesizer designed to generate precise, high frequency Clock Reference signals. This device is capable of generating frequencies up to 1.7GHz by combining an on-board voltage controlled oscillator (VCO) with fast-settling oversampled fractional-N synthesis techniques. For clock trees that require high frequency performance, the SI5355A-B01700-GMR can be used as a major timing source as well as a servo for phase-locked loop (PLL) integration.

Application Field

The SI5355A-B01700-GMR is well-suited for various high-speed communication applications, such as 100 GbE, Ethernet and LTE and optical communication systems. Its integrated phase detector and frequency-locked loop (PLL) make it well-suited for frequency multiplication and phase jitter mitigation applications.The SI5355A-B01700-GMR supports differential and single-ended input clock references, as well as multiple output frequencies. It is also programmable through a flexible serial interface, offering an on-board phase detector and a wide frequency range.The SI5355A-B01700-GMR also has various jitter-avoidance features, making it ideal for use in applications that require precise timing. Its on-board phase detector and fractional-N synthesis capabilities allow it to lock to an external reference clock with very low jitter. Furthermore, its built-in clock generator generates low jitter and creates a high-frequency clock that is suitable for use in digital data receivers.

Working Principle

The SI5355A-B01700-GMR contains a PLL with a difference frequency (DF) VCO, a fractional-N synthesizer and a high-speed differential phase detector. The difference frequency VCO is used to generate the clock outputs, while the fractional-N synthesizer is used for clocking and phase adjustment.The PLL consists of a voltage-controlled oscillator (VCO), a differential phase detector and charge pump, the fractional-N synthesizer, and a low-pass decimating filter (LPF). The VCO outputs a reference clock at a frequency determined by the generated voltage. The fractional-N synthesizer uses its two internal switches, called D/N and D/SEL, to divide the clock by a fractional amount so that a frequency lower than the VCO frequency is generated. The synthesizer then passes the divided clock to the differential phase detector, which compares the clock signals to the external reference clock. If the signals are out of phase, the PLL adjusts the VCO output frequency and the fractional-N divide ratio to match the reference clock.The SI5355A-B01700-GMR also has a low-pass decimating filter (LPF) to mitigate jitter, allowing the generated clock frequency to be well-controlled. The LPF also provides a low-jitter output clock.

Conclusion

The SI5355A-B01700-GMR Frequency Synthesizer is a high-performance device that excels in frequency synthesis applications. It features a fast-settling fractional-N synthesizer and low-jitter clock output for improved system reliability. It is well-suited for various high-speed communication applications, such as 100 GbE, Ethernet and LTE, and optical communications.

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