XC18V01PC20C Allicdata Electronics
Allicdata Part #:

122-1236-ND

Manufacturer Part#:

XC18V01PC20C

Price: $ 29.11
Product Category:

Integrated Circuits (ICs)

Manufacturer: Xilinx Inc.
Short Description: IC PROM SERIAL CONFIG 1M 20-PLCC
More Detail: N/A
DataSheet: XC18V01PC20C datasheetXC18V01PC20C Datasheet/PDF
Quantity: 850
1 +: $ 29.11000
10 +: $ 28.23670
100 +: $ 27.65450
1000 +: $ 27.07230
10000 +: $ 26.19900
Stock 850Can Ship Immediately
$ 29.11
Specifications
Series: --
Packaging: Tube 
Part Status: Active
Programmable Type: In System Programmable
Memory Size: 1Mb
Voltage - Supply: 3 V ~ 3.6 V
Operating Temperature: 0°C ~ 70°C
Package / Case: 20-LCC (J-Lead)
Supplier Device Package: 20-PLCC (9x9)
Base Part Number: XC18V01
Description

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XC18V01PC20C is a region-based 256K non-volatile, one-time-programmable (OTP) configuration memory, which is mainly used for configuring FPGAs. It is the most compact and low power consuming OTP memory available in the industry. In this article, the application fields and working principles of the XC18V01PC20C are discussed.

This type of configuration memory is mainly used for standard FPGAs, like XILINX’s Virtex™ series and Spartan™ series, Altera\'s APEX™ series and Cyclone™ series. It is also used to configure complex-gate count FPGAs and CPLDs, such as Altera\'s Stratix™ series, Xilinx\'s Virtex II™ Pro, and Lattice Semiconductor\'s ispPAC™. This memory is widely used in different types of programming and encryption applications, in data security and network communication.

The working principle of the XC18V01PC20C is relatively simple. The Configuration PROM stores a configuration bitstream that is generated by the FPGA or CPLD manufacturer\'s development software. When the Configuration PROM is powered up, the FPGA or CPLD looks to the Configuration PROM to configure the FPGA or CPLD into its intended operating state. During the power up, first the address bus is fed with an active low signal, then the address bus is supplied with an appropriate address, followed by an active low signal on the data bus. Then the data is stored in the required location of the memory This whole process is done for all the required data, in a very short time. The configuration PROM will then remain in the same state and provide the same data, until it is changed by reprogramming.

The XC18V01PC20C offers a number of features that make it an ideal choice for FPGA and CPLD configurations. It supports fast configuration: its quick access cycles, long erase & programming cycles, and efficient level-translator Fast-Quad Flat No-leads (FQFN) packages make the XC18V01PC20C ideal for configuring high-performance, low-power FPGAs. In addition, it offers unbeatable configuration error detection and correction (ECC) capabilities that can detect and correct any single errors in the bitstream.

The XC18V01PC20C also features comprehensive security capabilities. It can be programmed and reprogrammed in-system with a high degree of security. It also features an optional internal password protection mechanism, which prevents unauthorised access to the contents of the memory. This feature helps to prevent unauthorised users from tampering with the FPGA\'s configuration.

In conclusion, XC18V01PC20C is a region-based 256K non-volatile, one-time-programmable (OTP) configuration memory. It is mainly used for standard FPGAs, like XILINX’s Virtex™ series and Spartan™ series, Altera\'s APEX™ series and Cyclone™ series. It offers fast configuration, excellent error correction and extensive security capabilities. These features make the XC18V01PC20C an ideal choice for configuring FPGAs and CPLDs.

The specific data is subject to PDF, and the above content is for reference

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