Small suggestions and summary about the FPGA

Learn FPGAs, a little suggestion and summary.

AT94K40AL-25BQC

Understand synchronous and asynchronous is a necessary. Understand the blocking and non-blocking statements at the grammatical level, and describe the timing description of the Verilog language. Think of yourself as a compiler, try to compile your own module, and constantly summarize the logic of your design circuit.

Finally, be sure to master the design of the state machine. This is the initial level and the most basic requirement.

Some people say that the grammar is too simple. This is a very one-sided statement, or a very simple statement. Although verilog is similar to C language, it is very different in nature. The Verilog language is not simple. In particular, the timing between modules cannot be synchronized. When the signal output of the same phase has a phase difference, it is a very troublesome thing.

Master applications for top-down design, complex timing, synchronous and asynchronous timing.

Mastering the application of the IP core will configure the IP core and will find that the door to the new world is being opened. At this time, the real advantage of FPGA is reflected.

Being able to understand the SOC, the above four stages are at the bottom of the hardware, and the SOC is the application layer.

In short, FPGA is something that should not be underestimated. It can do all the MCUs and most CPUs on the market, and some even better than dedicated chips. Of course, the only drawback is that the power consumption is slightly higher.

If you want to know more, our website has product specifications for FPGA, you can go to ALLICDATA ELECTRONICS LIMITED to get more information