What is the working principle of ISL6545 chip?

The Intel motherboard supports DDR3 memory from the H55 chipset, while the AMD motherboard supports DDR3 memory from the RS880 chipset and supports 8GB up to the maximum. DDR3 memory operates more frequently than DDR2 memory, with maximum support for 1600MHz. However, the operating voltage of the DDR3 memory is only 1.5V, and the general motherboard provides about 24A current. Memory power supply commonly used control chips are UP6109, UP6103, ISL6545.

The ISL6545 works as shown in figure 1.

Fig.1 The ISL6545 works.

ISL6545 works as follows.

1. 12V voltage through the tube D10, current limiting resistance R486 to U9 chip 5-pin power supply, 12V through Schottky diode Q75 to the chip 1-pin power supply.

2. 5VDUAL supplies 2-pin power to MOS tube Q50.

3. The tap switch rear bridge sends out the-S4_S5 high-level signal that is sent through the resistor R458 to the B pole of the transistor Q65, Q65 is on, and the C pole is pulled to a low level. The B of transistor 0 is extremely low and Q69 is cut off. Through the U9 internal pull-up 7 feet to obtain a high-level turn-on signal.

4. U9 controls Q50 from the 2-pin output signal. The 5VDUAL slowly charges the inductor L6 and capacitor BC153 through L7 and Q50, and outputs the DDR_15V voltage to power the memory.

5. After the # Q50 leads, the L6, BC153 slowly charge, the DDR_15V voltage will slowly rise, from the resistance R460 and R468 partial voltage sampling to the U9 6 feet, in the internal com

parison with the 0.6V reference voltage.

6. When the 6-pin voltage of the U9 is higher than 0.6V, the U9 controls the 2-pin output signal so that Q50 is turned off and Q57 is switched on from the 4-pin output signal.

7. Q57 leads to the formation of a closed loop, inductor L6, capacitor BC153 discharge output DDR_ 15V voltage to power the memory. The DDR_15V voltage drops slowly during discharge and returns to 6 feet after sampling resistance.

8. When the 6-pin voltage is less than 0.6V, the chip closes the lower Q57 and reopens the upper Q50 to charge.

9. Under the control of U9, Q50, Q57 cycle work by the capacitor filter output smooth DDR_15V voltage to power the memory.

This article is from Allicdata Electronics Limited. Reprinted need to indicate the source.