
Allicdata Part #: | AT29C256-70TI-T-ND |
Manufacturer Part#: |
AT29C256-70TI-T |
Price: | $ 0.00 |
Product Category: | Integrated Circuits (ICs) |
Manufacturer: | Microchip Technology |
Short Description: | IC FLASH 256K PARALLEL 28TSOP |
More Detail: | FLASH Memory IC 256Kb (32K x 8) Parallel 70ns 28-... |
DataSheet: | ![]() |
Quantity: | 1000 |
1 +: | 0.00000 |
Series: | -- |
Packaging: | Tape & Reel (TR) |
Part Status: | Obsolete |
Memory Type: | Non-Volatile |
Memory Format: | FLASH |
Technology: | FLASH |
Memory Size: | 256Kb (32K x 8) |
Write Cycle Time - Word, Page: | 10ms |
Access Time: | 70ns |
Memory Interface: | Parallel |
Voltage - Supply: | 4.5 V ~ 5.5 V |
Operating Temperature: | -40°C ~ 85°C (TC) |
Mounting Type: | Surface Mount |
Package / Case: | 28-TSSOP (0.465", 11.80mm Width) |
Supplier Device Package: | 28-TSOP |
Base Part Number: | AT29C256 |
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Memory
The AT29C256-70TI-T is a high-performance 32,768-bit CMOS Electrically Erasable Programmable Read-Only Memory (EEPROM) device with an access time of 70 nanoseconds.
The memory is organized as 4,096 words x 8 bits and is fabricated using the Atmel Corporation\'s CMOS EEPROM Technology. This technology eliminates the need for UV radiation for erasing and provides lower power consumption than the larger EEPROMs using the traditional UV-EPROM technology.
Application Field
The AT29C256-70TI-T EEPROM is intended to replace non-volatile memory components such as EPROMs and batteries in products such as cellular phones, personal digital assistants (PDAs), portable computers, embedded control systems, automotive systems, telecom switching systems and other products needing a combination of security, space savings, low power consumption, and fast access time.
Working Principle of the AT29C256-70TI-T
The AT29C256-70TI-T EEPROM employs Electrically Erasable (EE) technology to store and erase information. This technology eliminates the need for costly UV equipment and is read at the same speed as EEPROMs using the traditional EPROM technology.
The device utilizes a Split-Gate Accessfet Structure which consists of two separate gates. The first gate is the security gate which is used to secure the data in the memory. The second gate is the access gate, used to write to and read from the memory. The security gate can be erased with a negative electrical field, while the access gate is written to and read from with standard logic signals.
A write operation first involves programming the access gate. Then a timed high voltage pulse is applied to the security gate. The voltages used depend on the security algorithm used by the device. Programming both gates takes less than 5 milliseconds. Erasing requires a negative voltage on the security gate for several milliseconds.
Reading data from the AT29C256-70TI-T is done through the access gate. The chip is selected using its chip select line and a signal is sent to initiate the read operation. The data is then transferred from the memory in a serial fashion. The read speed of the device is 70 nanoseconds.
The specific data is subject to PDF, and the above content is for reference
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