CDCE906PW

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CDCE906PW Clock/Timing - Clock Generators, PLLs, Frequency Synthesizers

CDCE906PW is a high performance, low jitter clock generator solution available in a 9 x 9 mm quad flat no-lead (QFN) package. It is specifically designed for applications involving high-speed systems based on PCI Express (PCIe), Gigabit Ethernet (GbE), Serial ATA (SATA), Universal Serial Bus (USB), Gigabit Ethernet (GbE), Thunderbolt, and other emerging technologies. The CDCE906PW provides a crystal oscillator for system reference clock and a jitter-cleaning, low noise clock synthesizer for the system clocks. It is optimized for frequency flexibility and drive strength for any PCI Express-based system.

The CDCE906PW is designed to offer fast interface clock frequency synthesizing, system reference clock distribution and a low-jitter clock distribution solution in a single package. It is usually used in applications that require a high frequency, low-jitter clock reference with a frequency range from 100MHz to 150MHz. It is used in applications that require multiple clock frequencies in the same circuit board, or in systems where the reference clock must be distributed to multiple locations throughout the board. It is also commonly used in clock solutions where low-jitter performance is vital, such as in communication systems, servers and embedded systems.

The working principle of the CDCE906PW is based on a frequency synthesizer output stage, which utilizes a voltage controlled oscillator (VCO), a phase-locked loop (PLL), an injector-locked loop (ILL) and selectable reference clock dividers. The VCO is used to generate an output frequency based on an input voltage from a reference source. The PLL then locks the output frequency to the reference input frequency, allowing for accurate and stable frequency generation. Additionally, the ILL, which allows for synchronization among multiple system references, is also used. Finally, the reference clock dividers are used to divide the reference clock into smaller, more usable clock frequencies for downstream systems.

CDCE906PW’s integrated frequency synthesizer achieves low jitter performance and high accuracy by filter the noise and phase-shift limited reference clock at the input nodes of the frequency synthesizer, before providing a clean, low-jitter output clock frequency. The device also provides an integrated phase-locked loop (PLL) circuit to extract a reference clock, and provides independent control of the PLL’s charge pump and loop filters to allow users to fine tune the device’s reference clock behavior. Additionally, the device is designed for use with an external crystal for best reference clock performance.

The CDCE906PW delivers significant system performance improvements through low jitter output and frequency flexibility. It is ideal for applications needing low-jitter clock reference with multiple output frequencies, or when multiple system reference cycles are needed on the same PCB. Its combination of a voltage controlled oscillator (VCO) and PLL provide flexibility and accuracy in frequency shifting, and its low jitter output enables higher throughput and stability in the system. It is also power-optimized, consuming 3.2V at nominal 5mA.

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