DP83848C-MAU-EK

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The DP83848C-MAU-EK demonstration board is an Evaluation and Demonstration Board and Kit that lets users evaluate and explore the features of the DP83848C-MAU Ethernet physical layer (PHY) device. The DP83848C-MAU device is a high-performance, low-power single-port fast Ethernet PHY that meets the requirements of full-duplex Gigabit Ethernet systems with 10BASE-T, 100BASE-TX, 1000BASE-T and EEE-based power savings capabilities.

The DP83848C-MAU is designed to reduce system power consumption by implementing standards-based power-saving modes that can reduce power to 0.2 W in the enabled state and < 1 μW in the disabled state. It supports Carrier Sense Multiple Access with Collision Detection (CSMA/CD), waking from sleep, and a low-power link disconnect.

The DP83848C-MAU-EK demonstration board works by combining the DP83848 gas discharge visual indicator with the performance of a DP83848C-MAU device and a DP83848 on-board Ethernet transceiver with a simple resistor network. The gas discharge visual indicator can be used to observe the network traffic in real-time. The resistor network includes an automatic filter that can be used to set up a network with multiple DP83848C-MAU-EK devices.

The DP83848C-MAU is compatible with industry-standard Ethernet devices and is intended for use in a Low Voltage Differential Signal (LVDS) environment with up to 100 m of Category 5 twisted-pair cable. The DP83848C-MAU supports IPv4, IPv6, TCP/UDP, and a range of other protocols. It also supports enhanced features for time-sensitive networking traffic such as IEEE 1588, Quality of Service (QoS), and Precision Time Protocol (PTP).

The DP83848C-MAU-EK demonstration board features a development board with supporting FPGA-based IP core examples, an Ethernet application demonstration, a USB-based data acquisition and analysis, and a suite of reference designs for a variety of Ethernet applications. It has an integrated four-port 10Base-T/100Base-TX Ethernet controller, an 8–Pin physical layer (PHY) device connected to the board via a RJ45 connector, and a power-management circuit for power control. The board also has an LCD display for the user interface, an EEPROM for the configuration data storage, and a USB-UART bridge.

The DP83848C-MAU-EK demonstration board is suitable for a wide range of Ethernet applications. Designers can use it to evaluate the features and performance of the DP83848C-MAU Ethernet PHY device. The demonstration board allows for the configuration of options including auto-negotiation, link speeds, and Gigabit Ethernet. Additionally, the board has an integrated trace port for debugging and monitoring link traffic from the DP83848C-MAU. This can help a user to isolate and troubleshoot a link issue.

In short, the DP83848C-MAU-EK demonstration board is an Evaluation and Demonstration Board and Kit designed to let a user evaluate and explore the features of the DP83848C-MAU Ethernet physical layer. It can be used to configure a wide range of Ethernet applications. The board also has an integrated trace port for debugging and monitoring link traffic from the DP83848C-MAU.

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