DS92LV3222TVSX/NOPB Allicdata Electronics
Allicdata Part #:

DS92LV3222TVSX/NOPB-ND

Manufacturer Part#:

DS92LV3222TVSX/NOPB

Price: $ 4.31
Product Category:

Integrated Circuits (ICs)

Manufacturer: Texas Instruments
Short Description: IC DESERIAL LVDS 32BIT 64TQFP
More Detail: 1.6Gbps Deserializer 2 Input 32 Output 64-TQFP (10...
DataSheet: DS92LV3222TVSX/NOPB datasheetDS92LV3222TVSX/NOPB Datasheet/PDF
Quantity: 1000
1 +: $ 4.31000
10 +: $ 4.18070
100 +: $ 4.09450
1000 +: $ 4.00830
10000 +: $ 3.87900
Stock 1000Can Ship Immediately
$ 4.31
Specifications
Series: --
Packaging: Tape & Reel (TR) 
Part Status: Active
Function: Deserializer
Data Rate: 1.6Gbps
Input Type: Channel Link II (LVDS)
Output Type: Channel Link II (LVCMOS)
Number of Inputs: 2
Number of Outputs: 32
Voltage - Supply: 3.135 V ~ 3.465 V
Operating Temperature: -40°C ~ 85°C (TA)
Mounting Type: Surface Mount
Package / Case: 64-TQFP
Supplier Device Package: 64-TQFP (10x10)
Base Part Number: DS92LV3222
Description

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DS92LV3222TVSX/NOPB is an integrated serializer/deserializer (SERDES) transceiver IC with a differential LVDS interface. It is used in a wide array of high-speed serial communications applications include DisplayPort (DP) 1.4/4.00G and High Definition Multimedia Interface (HDMI) 2.0b. This interface provides a high speed data rate, bigger signal swing and required high EMI protection. It operates from operating temperature range of -40 °C up to +85 °C.

The DS92LV3222TVSX/NOPB is designed to handle a wide variety of high-speed applications including high-definition video and audio, 10Gbit/s Ethernet and 10G Fibre Channel. It supports up to 18 bit data x 4 channels at 1.6 Gb/s serial data rate. The on chip fixed equalization and automatic equalization circuits provide pre-compensation to compensate for transmission media losses. The high-speed differential LVDS interface reduces EMI susceptibility, allowing the user to minimize radiated interferences across a wide frequency spectrum.

The DSP core in this device provides a powerful solution for implementing industry-standard interfaces. It allows for implementation of custom, low-cost serial protocol controllers. To support multi-protocols and multiplexed configurations, the core provides independent programmability for each transmit or receive path. On-chip Phase Locked Loop (PLL) generates two or four identical LVDS output clocks with an evaluation setup for optimum performance.

The DS92LV3222TVSX/NOPB is ideal for low-voltage systems, providing support for LVCMOS, 3.3V LVTTL and 1.8V LVTTL input logic swings. In order to support the low voltage systems, the device provides adjustable internal Series Termination and Bias circuit. The Series Termination circuit allows the user to match the differential load of the LVDS pairs and the Bias circuit allows the user to adjust the LVDS pulse width and phase margin.

The device also allows the user to adjust the data rate up to 10bit/word. The on-chip differential termination resistors can be switched on/off to reduce power dissipation. The device also supports multiple operating modes such as Single Lane, Dual Lane, Quad Lane or High Speed Quad Lane. The DS92LV3222TVSX/NOPB has an excellent signal integrity and jitter performance, making it ideal for high-speed digital interconnect applications. It also supports a wide supply voltage range of 5V – 3.3V.

In terms of its applications, the DS92LV3222TVSX/NOPB can be used in a variety of high-speed serial communications including: High Definition Multimedia Interface (HDMI) 2.0b, DisplayPort (DP) 1.4/4.00G, 10Gbit/s Ethernet, 10G Fibre Channel, and more. It features a robust design and low-cost components with an excellent signal integrity and jitter performance, making it an ideal device choice for high-speed digital interconnect applications. In addition, it provides support for adjustable internal Series Termination and Bias circuit, allowing the user to match the load of the differential LVDS pairs and adjusting the LVDS pulse width and phase margin.

To summarize, the DS92LV3222TVSX/NOPB is an integrated serializer/deserializer (SERDES) transceiver IC with a differential LVDS interface which provides a high speed data rate, bigger signal swing and required high EMI protection. It supports up to 18 bit data x 4 channels at 1.6 Gb/s serial data rate and operates from operating temperature range of -40 °C up to +85 °C. On-chip Phase Locked Loop (PLL) generates two or four identical LVDS output clocks with an evaluation setup for optimum performance. The device also supports a wide supply voltage range of 5V - 3.3V and adjustable internal Series Termination and Bias circuit, allowing the user to match the load of the differential LVDS pairs and adjusting the LVDS pulse width and phase margin. This device is suitable for a variety of high-speed serial communications including: High Definition Multimedia Interface (HDMI) 2.0b, DisplayPort (DP) 1.4/4.00G, 10Gbit/s Ethernet, 10G Fibre Channel, and more, making it an ideal choice for a wide range of high-speed digital interconnect applications.

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