S9S08SG16E1CTG

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1. Describe

The S9S08SG16E1CTG is a member of the low-cost, high-performance HCS08 family of 8-bit microcontrollers unit (MCU). All MCUs in this family use the enhanced HCS08 core and offer a variety of Module, memory size, memory type, and package type. high temperature equipment Meet or exceed AEC Class 0 requirements, allowing them to operate at temperatures up to 150°C.

2. Feature

    1. 8-bit HCS08 central processing unit (CPU)

        - 40 MHz HCS08 CPU (Central Processing Unit)

        - 36 MHz HCS08 CPU above 125 °C

        - HC08 instruction set with BGND instruction added

        - Supports up to 32 interrupt/reset sources

    2. On-chip memory

        - Flash read/program/erase over full operating voltage and temperature range

        - Random Access Memory (RAM)

    3. Power saving mode

        - Two very low power stop modes

        - Power saving standby mode

        - Low-power real-time interrupts for run, wait and stop

    4. Clock Source Options

        - Oscillator (XOSC) – Loop Control Pierce Oscillator; crystal or ceramic resonator range from 31.25kHz to 38.4kHz or 1MHz to 16MHz

        - Internal Clock Source (ICS) – The Internal Clock Source block contains a Frequency Locked Loop (FLL) controlled by an internal or external reference. Trim of Internal Reference Allows 0.2% Resolution and 1.5% Temperature Deviation –40 to 125 °C or > 125 °C and 3% Voltage Deviation; Bus Supported Frequency from 2MHz to 20MHz.

    5. System Protection

        - Watchdog computer operating normally (COP) reset, optionally running from dedicated 1-kHz internal clock source or bus clock

        - Low voltage detection with reset or interrupt; selectable travel point

        - Illegal opcode detection with reset

        - Illegal address detection with reset

        - Flash block protection

    6. Development Support

        - One-wire background debugging interface

        - Breakpoint feature allows setting a single breakpoint during in-circuit debugging (plus two breakpoints in the on-chip debug module)

        - On-chip In-Circuit Emulation (ICE) debug module with two comparators and nine trigger modes. Eight deep FIFOs for storing stream address changes and event-only data. The debug module supports marked and forced breakpoints.

3. Pin configuration

4. Peripherals

    1. ADC - 12 channels, 10-bit resolution, 2.5 µs conversion time, auto-compare, temperature sensor, internal bandgap reference channel; operates in stop3

    2. ACMP – analog comparator with selectable interrupt on rising, falling or either edge of comparator output; compare option with fixed Internal bandgap voltage reference; output can be optionally routed to TPM module; operates in stop3

    3. SCI – full duplex non-return-to-zero (NRZ); LIN master extended interrupt generation; LIN slave extended interrupt detection; wake-up on active edge

    4. SPI—full-duplex or single-wire bidirectional; double-buffered transmit and receive; master or slave; MSB-first or LSB-first shift

    5. IIC – up to 100 kbps at maximum bus load; multi-master operation; programmable slave addresses; interrupt-driven byte-by-byte data transfers; supports broadcast mode and 10-bit addressing

    6. MTIM – 8-bit modulo counter with 8-bit prescaler and overflow interrupt

    7. TPMx – Two 2-channel timer pwm modules (TPM1, TPM2); selectable input capture, output compare or buffered edge or center-aligned PWM on each channel

    8. RTC – (Real Time Counter) 8-bit modulo counter with binary or decimal based prescaler; external clock source for precise time base, time, calendar or task scheduling functions; free running on-chip low power consumption Oscillator (1 kHz), requires no wake-up cycles from external components, operates in all MCU modes

5. Input Output

    1. 16 general purpose I/O pins (GPIO)

    2. 8 interrupt pins with selectable polarity

    3. Linked output option for PTB[5:2] and PTC[3:0]; allows a single write to change the state of multiple pins

    4. Hysteresis and configurable pull-up devices on all input pins; configurable slew rate and drive strength on all output pins.