CDCE706PW

Series:	--
Packaging:	Tube
Lead Free Status / RoHS Status:	--
Part Status:	Active
Moisture Sensitivity Level (MSL):	--
Type:	PLL Frequency Synthesizer
PLL:	Yes with Bypass
Input:	LVCMOS, Crystal
Output:	LVCMOS
Number of Circuits:	1
Ratio - Input:Output:	1:6
Differential - Input:Output:	Yes/No
Frequency - Max:	300MHz
Divider/Multiplier:	Yes/Yes
Voltage - Supply:	3 V ~ 3.6 V
Operating Temperature:	-40°C ~ 85°C
Mounting Type:	Surface Mount
Package / Case:	20-TSSOP (0.173", 4.40mm Width)
Supplier Device Package:	20-TSSOP
Base Part Number:	CDCE706

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The CDCE706PW is an integrated phase-locked loop (PLL) device from Texas Instruments that provides a programmable clock architecture for basic clock distribution functions. It is designed to generate multiple high performance frequencies from a low cost crystal or reference clock.The CDCE706PW has a highly programmable clocking architecture to allow for flexible implementation of clock systems. The device can generate up to four output clocks (clocks 0, 1, 2, and 3) with independent input to output frequencies; four set output frequency dividers; and two programmable duty cycle dividers. The four output clocks can be separately configured as high-frequency outputs with different internal dividers and no duty cycle distortion. It also features four independent input clock skew correction taps (clocks 0, 1, 2, and 3), two selectable charge-pump currents (CPI and CPII), programmable clock/reference options, and flexible PLL control.This device is well suited for use in a variety of applications, including digital audio/video encoding, streaming media, computer system clocks, industrial control systems, and networking systems. It is also well suited for use in distributed applications, such as multiple clock domains and interleaved clock systems.In terms of clock and timing applications, the CDCE706PW is ideal for low-cost programs which require the generation of multiple different output frequencies and/or the programmable clocking of multiple systems. The device offers a choice of several divide ratios (1 to 256), allowing the flexibility in system design. Moreover, the CDCE706PW is designed to provide a virtually noiseless clock and reduces power consumption, making it perfect for battery-operated applications.The CDCE706PW uses a phase-locked loop (PLL) architecture to generate multiple output clocks from a single reference clock. This architecture is well known for its ability to accurately and programmably generate the desired frequency. The core of the device consists of a VCO (Voltage Controlled Oscillator) and a phased-locked loop (PLL) control circuitry. The references, dividers, and counters that compose the PLL, together with the VCO, provide the characteristics of the output clock.The CDCE706PW also features a two-phase charge-pump design which provides support for both low and high-frequency settings of the VCO, independent of the reference frequency. This allows the device to lock onto a reference clock and output a higher frequency output.Ultimately, the CDCE706PW is an ideal solution for those looking for a highly programmable clock generator/synthesizer with a small footprint. The device offers a variety of features and options to fit different system and application needs. As such, it is particularly well suited for applications such as digital audio/video encoding and streaming media, as well as distributed applications such as multiple clock domains and interleaved clock systems.

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