NB6L14MMNR2G Allicdata Electronics
Allicdata Part #:

NB6L14MMNR2GOSTR-ND

Manufacturer Part#:

NB6L14MMNR2G

Price: $ 4.84
Product Category:

Integrated Circuits (ICs)

Manufacturer: ON Semiconductor
Short Description: IC CLK BUFFER 1:4 3GHZ 16QFN
More Detail: Clock Fanout Buffer (Distribution) IC 1:4 3GHz 16-...
DataSheet: NB6L14MMNR2G datasheetNB6L14MMNR2G Datasheet/PDF
Quantity: 1000
3000 +: $ 4.39488
Stock 1000Can Ship Immediately
$ 4.84
Specifications
Series: ECLinPS MAX™
Packaging: Tape & Reel (TR) 
Part Status: Active
Type: Fanout Buffer (Distribution)
Number of Circuits: 1
Ratio - Input:Output: 1:4
Differential - Input:Output: Yes/Yes
Input: CML, LVDS, LVPECL
Output: CML
Frequency - Max: 3GHz
Voltage - Supply: 2.375 V ~ 3.63 V
Operating Temperature: -40°C ~ 85°C
Mounting Type: Surface Mount
Package / Case: 16-VFQFN Exposed Pad
Supplier Device Package: 16-QFN (3x3)
Base Part Number: NB6L14
Description

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NB6L14MMNR2G Application Field and Working Principle

Clock/Timing - Clock Buffers, Drivers is the field of NB6L14MMNR2G, which is a new generation low skew and low jitter clock drivers of fanout with 14 outputs. It is suitable for high speed clock distribution system with low jitter and low skew clock outputs. It includes features such as low skew and low phase jitter performance, two-way voltage supply and low current consumption.

Introduction

NB6L14MMNR2G is a low skew and low jitter clock driver of fanout with 14 outputs. It is suitable for high speed clock distribution system with low jitter and low skew clock outputs. It has optimized rise and fall times and low phase jitter according to IEEE Standard 1588 specification. It also has two-way voltage supply and low power consumption for high efficiency and low energy consumption.

Application Field

The application field of NB6L14MMNR2G are high speed clock distribution system such as GDDR5 high resolution clock distribution board, ultraspeed transceivers, and PCI Express wireless receiver. NB6L14MMNR2G fanout clock driver can be used to provide an uniformly distributed clock signal over 14 outputs, while maintaining a precise jitter profile with clock-skew values below 25ps, and address the portable devices power efficiency and cost restrictions.

Features of NB6L14MMNR2G

The low skew and low jitter clock driver of fanout with 14 outputs of NB6L14MMNR2G includes features such as:
  • Low skew and low jitter performance.
  • Two-way voltage supply from either 1.8, 2.5 or 3.3V.
  • Low current consumption for ultra low energy requirements.
  • Can sustain 16 Gbps data rate.
  • Outputs can be deduced in PECL/HCSL, LVDS and LVPECL.
  • Optimized rise and fall times and low phase jitter according to IEEE Standard 1588 specification.

Working Principle

The working principle of NB6L14MMNR2G is based on clock buffer, which is a device used to “buffer” or amplify a clock signal. It can drive multiple outputs with the same clock signal but at different levels. The clock buffer doubles the drive current capabilities on the outputs, which reduces the load effects on the clock outputs. This is particularly beneficial for applications requiring very long trace lengths, or for those where the load being driven is of significant capacitive load.NB6L14MMNR2G has two-way voltage supply from either 1.8, 2.5 or 3.3V, which can maintain high speed data rate over 16Gbps. In addition, outputs can be deduced in PECL/HCSL, LVDS and LVPECL. The rising and falling edges are optimized significantly to lower the phase jitter further, which meets the requirements of IEEE Standard 1588 precision time protocol.In conclusion, NB6L14MMNR2G is a wide utilized low skew and low jitter clock driver of fanout with 14 outputs in high speed clock distribution system. It provides two-way voltage supply, low power consumption and outputs in multiple kind of protocols. It also can sustain high speed data rate up to 16Gbps. The low skew and low phase jitter performance of NB6L14MMNR2G will improve the efficiency of the clock distribution system significantly.

The specific data is subject to PDF, and the above content is for reference

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