ADP1761ACPZ-1.3-R7

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PMIC (Power Management Integrated Circuit) has evolved with the advancement of technology to further address circuit power management issues. Voltage Regulators – Linear is one type of PMIC solution which can be found in various electrical devices and applications. The ADP1761ACPZ-1.3-R7 (hereafter referred to as ADP) is a Linear Regulator developed by Analog Devices. This document will discuss the ADP’s application fields, working principle, design features and other pertinent information about the regulator.

Application Field

The ADP is a 2.2 A linear voltage regulator with a single enable feature. Due to its features, it can be applied in a wide range of power management solutions from providing local power to creating safe drop out. The ADP is targeted at low load current applications, and its wide input voltage of 3V to 20V makes it suitable for use in systems where input voltage may vary. It also has both EN and PGOOD pins, which simplifies power good detection, assuring the system logic that output voltage of the regulator is within the accepted range. This makes the ADP ideal for systems requiring high power efficiency and fault tolerance.

Working Principle

The ADP is a linear current-mode voltage regulator based on an analog voltage error amp (Vref) and an n-channel MOSFET that functions as a power switch. The power switch is either enabled or disabled by setting the EN pin to either high or low. When enabled, a voltage divider of R1 and R2 is used to set the desired output voltage. To adjust the output voltage of the regulator, the reference voltage of Vref is compared to the voltage of the feedback pin. If the voltage at the feedback pin is lower than Vref, the power switch is turned on to draw current and increase the voltage at the output. Conversely, when the voltage at the feedback pin is higher than the Vref, the power switch is disabled to reduce the voltage at the output. The ADP is also capable of entering sleep mode when the EN pin is set to low, reducing quiescent current and providing an effective means for further power savings.

Apart from its basic voltage regulation features, the ADP also includes several features for additional system efficiency and protection. The ADP is able to provide power savings through pulse-skip mode and pulse-width modulation (PWM) mode. Pulse-skip mode is enabled when the current consumption is moderate, whereas PWM mode kicks in for higher current consumption. Both enabled, the ADP is able to achieve an efficiency rate of up to 95%. Furthermore, the ADP is also designed with current sensing, inrush-current control, over-voltage and over-temperature protections that help to ensure that the regulator maintain output voltage within the expected range and prevent system damage due to overloading conditions.

Other design features

The ADP boast an impressive slew rates, with a current-limit set of 2.2 A, an output voltage accuracy of ±0.7%, and a dropout voltage rating of 0.3V. Non-volatile registers are integrated, and their settings can be updated during normal operation to enhance system reliability. Soft-start to the output voltage is available, and it eliminates the inrush current during power-up. Furthermore, the ADP also includes an adjustable frequency that allows users to select between 225kHz and 1.3 MHz when adjusting their system.

The ADP is a highly efficient and reliable voltage regulator. Not only does it come with regulated output voltage and adjustable frequency, but it also includes features that helps the system to utilize power sources more efficiently and respond quickly to load transients. Additionally, the ADP can offer protection against overloading and enables the system to reduce quiescent current when necessary. All these feature makes the ADP suitable for a wide range of system designs.

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