ADS58C48IPFP

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The ADS58C48IPFP is a high-performance, low-power, 12-bit, 2.7 GSPS analog-to-digital converter (ADC). The device is designed with a 5-stage pipelined architecture that utilizes up to 6 analog inputs in order to enable the highest possible sampling rates. The device delivers sampling rates up to 2.7 GSPS data rate and an excellent 66 dBc spurious-free dynamic range (SFDR) at 1.5 GHz input for an AC-coupled, 50Ω driver single ended mode.

ADS58C48IPFP is ideal for systems such a digital predistortion, cognitive radio, radio astronomy, telecommunications, and instrumentation equipment. The device includes an integrated high-performance digital-to-analog converter (DAC) for clock and data synthesis.

Application Field of ADS58C48IPFP

The device is commonly applied in communications, instrumentation, telecom and on-board test equipment, wireless infrastructure and software-defined radio (SDR) products. It is well-suited for applications such as digital predistortion, cognitive radio, and radio astronomy, as well as instrumentation equipment where the sampling frequency requirements reach up to 2.7 GSPS. Moreover, the device provides integrity and accuracy with a low power consumption at a very high data rate.

Working Principle of ADS58C48IPFP

The device architecture uses a 5-stage pipeline for signal conversion. An analog differential input is converted by a differential amplifier stage which includes a rail-to-rail input stage, a predriver, a source follower and a current buffer. After gain selection and clock conversion, the signal is delivered to the Multiplexer which receives multiple analog signals and performs signal combining. The signal is then converted into digital data by the ADC’s D-FF converter followed by the comparator and a 40-bit data latch for data retention and clock output. After successive quantization of information by logic signal, the signal is finally converted into a digital output which is driven to the output stage.

All functions of the device are controlled through an internal power-on-reset (POR) control and an external analog management system (AMS) signal. The AMS signal can be used to control the entire device’s power consumption. The device also includes an integrated Digital SiMulator (DSiM) feature that provides offline calibration, test and control of analog input and output performance.

Conclusion

The ADS58C48IPFP is a high-performance, low-power, 12-bit, 2.7 GSPS analog-to-digital converter. This device is designed to deliver sampling rates up to 2.7 GSPS and an excellent SFDR at 1.5 GHz input, making it an ideal solution for communications, instrumentation, telecom and on-board test equipment, wireless infrastructure and software-defined radio (SDR) products. Moreover, the device offers many features such as an integrated high-performance DAC for clock and data synthesis and a Digital SiMulator (DSiM) feature for offline calibration and control. This makes the device suitable for many different applications.

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