| Allicdata Part #: | MAX187CEWE-ND |
| Manufacturer Part#: |
MAX187CEWE |
| Price: | $ 0.00 |
| Product Category: | Integrated Circuits (ICs) |
| Manufacturer: | Maxim Integrated |
| Short Description: | IC ADC LP 5V 12-BIT SRL 16-SOIC |
| More Detail: | 12 Bit Analog to Digital Converter 1 Input 1 SAR 1... |
| DataSheet: | MAX187CEWE Datasheet/PDF |
| Quantity: | 1000 |
| 1 +: | 0.00000 |
| Number of A/D Converters: | 1 |
| Base Part Number: | MAX187 |
| Supplier Device Package: | 16-SOIC |
| Package / Case: | 16-SOIC (0.295", 7.50mm Width) |
| Operating Temperature: | -40°C ~ 85°C |
| Features: | -- |
| Voltage - Supply, Digital: | 5V |
| Voltage - Supply, Analog: | 5V |
| Reference Type: | Internal |
| Architecture: | SAR |
| Series: | -- |
| Ratio - S/H:ADC: | 1:1 |
| Configuration: | S/H-ADC |
| Data Interface: | SPI |
| Input Type: | Single Ended |
| Number of Inputs: | 1 |
| Sampling Rate (Per Second): | 75k |
| Number of Bits: | 12 |
| Part Status: | Active |
| Packaging: | Tube |
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The MAX187CEWE is an Analog-to-Digital Converter (ADC) from Maxim Integrated. It is a high-performance device that combines frequency to digital, gain and offset control, and selectable filtering into one package. This ADC can be programmed to sample analog signals up to 10MHz. The operation of this device is based on a three-phase clocking architecture, which allows for high-speed single-channel conversion with low power consumption.
Application field
The MAX187CEWE is suitable for use in many applications where data acquisition and conversion of analog signals are required. Some of these applications include: Telecommunications, Automotive, Industrial Control, Medical Instruments, Test and Measurement, Home and Building Automation, Military, and Aerospace. It is capable of sampling analog signals up to 10MHz and can be programmed to provide various resolution and accuracy levels with various degrees of filtering.
Working Principle
The MAX187CEWE is based on a three-phase clocking architecture which allows for high speed single-channel conversion with low power consumption. The three-phase clocking architecture used by the MAX187CEWE features three separate clock signals. The pulse width of each clock signal determines the effective sampling rate for the ADC. The first phase is a low-frequency sample clock (SCKL) and the second phase is a high-frequency sample clock (SCKH). The third phase of the clock is the control clock (CCK) which is used to control the conversion process and set the resolution and accuracy levels of the ADC.
The ADC is structured into two independent sections, the Charge Redistribution Analog to Digital Conversion (CRADC) section and the Digital Control (DC) section. The CRADC section controls the analog signal conditioning, such as sample clock generation, gain and offset control, filtering, and pulsewidth control. The DC section is responsible for decoding the control information from the CCK, generating status and control signals, managing digital data bits, and controlling interface communication.
The MAX187CEWE has a wide range of operating modes. The conversion mode and settling time can be programmed. The analog input signal can be filtered both digitally and/or externally depending on the selected operating mode. The conversion results can be output in either Binary or offset-Binary format (2\'s complement) in either 8, 10 or 12 bit resolutions.
The specific data is subject to PDF, and the above content is for reference
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MAX187CEWE Datasheet/PDF