S9KEAZN32AMLC

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1. Feature

    1. Operating characteristics

        – Voltage range: 2.7 to 5.5 V

        – Flash write voltage range: 2.7 to 5.5 V

        – Temperature range (ambient): -40 to 125°C

    2. Performance

        – Up to 40 MHz Arm® Cortex-M0+ core and up to 20 MHz bus clock

        – Single cycle 32-bit x 32-bit multiplier

        – Single-cycle I/O access port

    3. Memory and memory interfaces

        – Flash memory up to 64 KB

        – EEPROM up to 256 B

        – Up to 4 KB RAM

    4. Bell

        – Oscillator (OSC) - supports 32.768 kHz crystal or 4 MHz to 20 MHz crystal or ceramic resonator; select low power or high gain oscillator

        – Internal Clock Source (ICS) - Internal FLL with internal or external reference, 31.25 kHz prescaled internal reference for 40 MHz system and core clock.

        – Internal 1 kHz Low Power Oscillator (LPO)

    5. System Peripherals

        – Power Management Module (PMC) with three power modes: run, wait, stop

        – Low Voltage Detection (LVD) with reset or interrupt, selectable trip point

        – Watchdog (WDOG) with independent clock source

        – Programmable Cyclic Redundancy Check Module (CRC)

        – Serial Wire Debug Interface (SWD)

        – Bit Manipulation Engine (BME)

    6. Security and Integrity Module

        – 64-bit unique identification (ID) number for each chip

    7. Human-Machine Interface

        – Up to 57 general purpose input/output (GPIO)

        – Up to 22 General Purpose Input/Output (GPIO)

        – Up to 14 General Purpose Input/Output (GPIO)

        – Two keyboard interrupt modules (KBI) up to 8 bits

        – External Interrupt (IRQ)

    8. Analog module

        – One up to 16-channel 12-bit SAR ADC operating in stop mode with optional hardware trigger (ADC)

        – Two analog comparators including a 6-bit DAC and programmable reference input (ACMP)

    9. Timer

        – One 6-channel FlexTimer/PWM (FTM)

        – Two 2-channel FlexTimer/PWM (FTM)

        – A 2-channel Periodic Interrupt Timer (PIT)

        – Real Time Clock (RTC)

  10. Communication Interface

        – Two SPI modules (SPI)

        – Up to three UART modules (UART)

        – One I2C module (I2C)

  11. Package options

        – 64-pin LQFP

        – 32-pin LQFP

2. Voltage and Current Ratings

Absolute maximum ratings are stress ratings only, and functional operation at the maximum values is not guaranteed. Stresses beyond the limits specified in the table below may affect device reliability or cause permanent damage to the device. This equipment contains circuits that are protected from electric fields from high static voltages or damage; however, it is recommended that normal precautions be taken to avoid applying any voltage above the maximum rated voltage to this high impedance circuit. Operational reliability is improved if unused inputs are tied to appropriate logic voltage levels or if programmable pull-up resistors associated with the pins are enabled.

3. Electromagnetic Compatibility

Electromagnetic compatibility (EMC) performance is highly dependent on the environment in which the MCU is located. Circuit board design and layout, circuit topology selection, location and characteristics of external components, and MCU software operation play an important role in EMC performance.

4. FTM Module Timing

The synchronizer circuit determines the shortest identifiable input pulse or fastest clock and can be used as an optional external source for the timer counter. These synchronizers operate according to the current bus rate clock.

5. Thermal characteristics

This section provides information on operating temperature range, power dissipation, and package thermal resistance. The power dissipation on the I/O pins is typically small compared to the power dissipation in the on-chip logic and voltage regulator circuits and is determined by the user rather than controlled by the MCU design. To account for PI/O in power calculations, determine the difference between the actual pin voltage and VSS or VDD, then multiply by the pin current for each I/O pin. The difference between the pin voltage and VSS or VDD may be very small unless the pin current is unusually high (heavy load).