LM5165DRCR Allicdata Electronics
Allicdata Part #:

296-46273-2-ND

Manufacturer Part#:

LM5165DRCR

Price: $ 0.00
Product Category:

Integrated Circuits (ICs)

Manufacturer: Texas Instruments
Short Description: IC REG BUCK ADJ 0.15A 10VSONBuck Switching Regulat...
More Detail: N/A
DataSheet: LM5165DRCR datasheetLM5165DRCR Datasheet/PDF
Quantity: 18000
Stock 18000Can Ship Immediately
Specifications
Series: LM5165
Packaging: Tape & Reel (TR) 
Part Status: Active
Function: Step-Down
Output Configuration: Positive
Topology: Buck
Output Type: Adjustable
Number of Outputs: 1
Voltage - Input (Min): 3V
Voltage - Input (Max): 65V
Voltage - Output (Min/Fixed): 1.223V
Voltage - Output (Max): 65V
Current - Output: 150mA
Frequency - Switching: Up to 600kHz
Synchronous Rectifier: Yes
Operating Temperature: -40°C ~ 150°C (TJ)
Mounting Type: Surface Mount
Package / Case: 10-VFDFN Exposed Pad
Supplier Device Package: 10-VSON (3x3)
Base Part Number: LM5165
Description

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1. Describe

The LM5165DRCR device is a compact, easy-to-use 3V to 65V, Ultra-Low IQ Synchronous Buck Converter with High Efficiency Over Wide Input Voltage and Load Range Current range. with integrated high and low end Power MOSFET, up to 150mA output current can with a fixed output voltage of 3.3 V or 5 V or at adjustable output. The converter is designed to Simplifies implementation while providing options Optimize the performance of the target application. Select Pulse Frequency Modulation (PFM) mode For best light-load efficiency or constant on-time (COT) controls a nearly constant operating frequency. Neither control scheme requires looping compensated while providing excellent line and load Large transient response and short PWM on-time Buck conversion rate. High-side P-channel MOSFETs can operate at 100% duty cycle minimum dropout voltage Bootstrap capacitors for gate drive are not required. return, Current limit set point adjustable for optimization Inductor selection for specific output current Require. Selectable and adjustable start-up time Options include minimum delay (no soft start), Internally fixed (900 µs) and externally programmable Use capacitive soft-start. Open Drain PGOOD Indicators can be used for sorting, fault reporting, and output voltage monitoring. LM5165 Buck The converter is a 10-pin, 3-mm × 3-mm, 0.5mm Thermally Enhanced VSON-10 Package pin spacing.

2. Feature

    1. Wide input voltage range from 3 V to 65 V

    2. 10.5µA no-load quiescent current

    3. –40°C to 150°C Junction Temperature Range

    4. Fixed (3.3 V and 5 V) or adjustable output voltage

    5. Complies with EN55022 / CISPR 22 EMI standards

    6. Integrated 2-Ω PMOS buck switch

        – Supports 100% duty cycle for low dropout

    7. Integrated 1-Ω NMOS synchronous rectifier

        – No need for external rectifier diodes

    8. Programmable current limit set point (four levels)

    9. Selectable PFM or COT mode operation

  10. 1.223V ±1% internal voltage reference

  11. 900-µs internal or programmable soft-start

  12. Active slew rate control for low EMI

  13. Diode emulation mode and pulse skipping for ultra-high light load efficiency performance

  14. Monotonic startup to pre-biased output

  15. No loop compensation or bootstrap components

  16. Precision enable and input UVLO with hysteresis

  17. Pin-to-pin compatible with LM5166

  18. Thermal shutdown protection with hysteresis

  19. 10-pin, 3-mm × 3-mm VSON package

  20. Faster time to market with TPSM265R1 module

  21. Create custom regulator designs using WEBENCH® Power Designer

3. Application

    1. 4–20 mA loop powered sensor

    2. Automotive and battery powered devices

    3. High voltage LDO replacement

    4. Industrial Control Systems

    5. Universal bias supply

4. Pin configuration

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5. Pin Description

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6. Device Functional Modes

    1. Shutdown Mode

        The EN pin provides ON and OFF control for the LM5165. When VEN is below approximately 0.6 V, the device is in shutdown mode. Both the internal LDO and the switching regulator are off. The quiescent current in shutdown mode drops to 4.6 µA at VIN = 12 V. The LM5165 also employs internal bias rail undervoltage protection. If the internal bias supply voltage is below its UV threshold, the regulator remains off.

    2. Standby Mode

        The internal bias rail LDO has a lower enable threshold than the regulator itself. When VEN is above 0.6 V and below the precision enable threshold (1.212 V typically), the internal LDO is on and regulating. The precision enable circuitry is turned on once the internal VCC is above its UV threshold. The switching action and voltage regulation are not enabled until VEN rises above the precision enable threshold.

    3. Active Mode in PFM

        Similarly, the LM5165 is in PFM active mode when VEN and the internal bias rail are above the relevant thresholds, FB has fallen below the lower hysteresis level (VREF1), and boundary conduction mode is recharging the output capacitor to the upper hysteresis level (VREF2). There is a 4-µs wake-up delay from sleep to active states.

    4. Sleep Mode in PFM

        The LM5165 is in PFM sleep mode when VEN and the internal bias rail are above the relevant threshold levels, VFB has exceeded the upper hysteresis level (VREF2), and the output capacitor is sourcing the load current. In PFM sleep mode, the LM5165 operates with very low quiescent current.

7. Application Information

The LM5165DRCR only requires a few external components to convert from a wide range of supply voltages to a fixed output voltage. To expedite and streamline the process of designing of a LM5165-based converter, a comprehensive LM5165 Quick-start design tool is available for download to assist the designer with component selection for a given application. WEBENCH® online software is also available to generate complete designs, leveraging iterative design procedures and access to comprehensive component databases. The following sections discuss the design procedure for both COT and PFM modes using specific circuit design examples. As mentioned previously, the LM5165 also integrates several optional features to meet system design requirements, in


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