PUMD17,115 Discrete Semiconductor Products |
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Allicdata Part #: | 1727-1983-2-ND |
Manufacturer Part#: |
PUMD17,115 |
Price: | $ 0.04 |
Product Category: | Discrete Semiconductor Products |
Manufacturer: | Nexperia USA Inc. |
Short Description: | TRANS PREBIAS NPN/PNP 6TSSOP |
More Detail: | Pre-Biased Bipolar Transistor (BJT) 1 NPN, 1 PNP -... |
DataSheet: | PUMD17,115 Datasheet/PDF |
Quantity: | 1000 |
3000 +: | $ 0.03969 |
6000 +: | $ 0.03451 |
15000 +: | $ 0.02933 |
30000 +: | $ 0.02761 |
75000 +: | $ 0.02589 |
DC Current Gain (hFE) (Min) @ Ic, Vce: | 60 @ 5mA, 5V |
Base Part Number: | MD17 |
Supplier Device Package: | 6-TSSOP |
Package / Case: | 6-TSSOP, SC-88, SOT-363 |
Mounting Type: | Surface Mount |
Power - Max: | 300mW |
Frequency - Transition: | -- |
Current - Collector Cutoff (Max): | 1µA |
Vce Saturation (Max) @ Ib, Ic: | 150mV @ 500µA, 10mA |
Series: | -- |
Resistor - Emitter Base (R2): | 22 kOhms |
Resistor - Base (R1): | 47 kOhms |
Voltage - Collector Emitter Breakdown (Max): | 50V |
Current - Collector (Ic) (Max): | 100mA |
Transistor Type: | 1 NPN, 1 PNP - Pre-Biased (Dual) |
Part Status: | Active |
Packaging: | Tape & Reel (TR) |
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Understanding PUMD17,115 Application Field and Working Principle
The PUMD17,115 is a smart, dual pre-biased, bipolar, 10.6 V array FET (field-effect transistor) containing four N-channel, 1.7 kOhm, low voltage, MOSFETs. The array is designed for low parasitic capacitance and low on-state resistance (RDSON.) It is also designed for fast switching times and low current leakage for applications requiring high-speed signal processing. PUMD17,115 is an ideal array for a wide variety of applications requiring multiple discrete MOSFETs.
The PUMD17,115 is designed to operate at a specified voltage of 10.6 V, and its current handling capability is limited to 1.7 A. It is pre-biased to reduce device power dissipation, thereby improving performance and reliability. The pre-biased array consists of two arrays—one with a drain-source positive bias current and one with a negative bias current. The positive and negative bias currents are adjustable to optimize the device performance.
The array is constructed of an integrated circuit containing four N-channel MOSFETs, one at each corner of the transparent plastic housing. The integrated circuit also contains additional components such as resistors, capacitors, and other electronic devices used to enhance the performance of the array. The N-channel MOSFETs are formed on both sides of a silicon substrate and solder-coated for easy mounting.
The PUMD17,115 array is well-suited for a variety of applications, including high-definition video, audio, and voice signal processing, as well as power management. The array is designed for high-density and high-speed operation in high-volume applications. The device is also compatible with multiple bus platforms and can be used in a variety of configurations.
Working Principle of the PUMD17, 115
The PUMD17,115 Array consists of four N-channel MOSFETs that are pre-biased with a positive and negative bias current. The pre-biased array helps to reduce device power dissipation, resulting in improved performance and reliability. The integrated circuit also contains additional components such as resistors, capacitors, and other electronic devices used to enhance the performance of the array. The N-channel MOSFETs are formed on both sides of a silicon substrate and solder-coated for easy mounting.
When the PUMD17,115 is powered up, the positive and negative bias currents start to flow. The positive and negative bias current flows through the four N-channels of the array and through the resistors and capacitors on the substrate. This current is used to create a voltage across the channel of each MOSFET. This voltage is used to control the flow of electrons and holes, resulting in a current through the drain-source channel. The flow of current is then regulated by the pre-biased array.
The current in the drain-source channel also depends on the source voltage and channel resistance. If the source voltage is increased, the current will also increase. Similarly, if the channel resistance is increased, the current will be decreased, as the resistance determines how quickly the electrons and holes can move through the channel. This regulation of current is what allows for the high-speed operations that the PUMD17,115 is capable of delivering.
The PUMD17,115 array is well-suited for applications requiring high-speed signal processing and power management. The array is designed for low parasitic capacitive loading, low on-state resistance, fast switching times, and low current leakage. The device is designed for operation up to 10.6V, and is pre-biased to reduce device power dissipation and improve performance and reliability. The PUMD17,115 is an ideal choice for many high-volume applications requiring a multiple discrete MOSFET array.
The specific data is subject to PDF, and the above content is for reference
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PUMD17,115 | Nexperia USA... | 0.04 $ | 1000 | TRANS PREBIAS NPN/PNP 6TS... |
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PUMD18,115 | Nexperia USA... | 0.04 $ | 1000 | TRANS PREBIAS NPN/PNP 6TS... |
PUMD15,115 | Nexperia USA... | 0.04 $ | 3000 | TRANS PREBIAS NPN/PNP 6TS... |
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PUMD10,135 | Nexperia USA... | 0.03 $ | 1000 | TRANS PREBIAS NPN/PNP 6TS... |
PUMD15,135 | Nexperia USA... | 0.03 $ | 1000 | TRANS PREBIAS NPN/PNP 6TS... |
PUMD24,115 | Nexperia USA... | 0.04 $ | 1000 | TRANS PREBIAS NPN/PNP 6TS... |
PUMD20,115 | Nexperia USA... | 0.04 $ | 1000 | TRANS PREBIAS NPN/PNP 6TS... |
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PUMD6/ZLF | Nexperia USA... | 0.0 $ | 1000 | TRANS PREBIAS NPN/PNP 50V... |
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PUMD12/DG/B3,115 | Nexperia USA... | 0.0 $ | 1000 | TRANS RET SC-88Pre-Biased... |
PUMD16/ZLX | Nexperia USA... | 0.0 $ | 1000 | TRANS RET SC-88Pre-Biased... |
PUMD2/DG/B3,115 | Nexperia USA... | 0.0 $ | 1000 | TRANS RET SC-88Pre-Biased... |
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