25LC128-H/SN

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1. Description

Microchip Technology Inc. 25LC128-H/SN devices are Mid-density 8- through 256-Kbit Serial Electrically Erasable PROMs (EEPROM). The devices are organized in blocks of x8-bit memory and support the Serial Peripheral Interface (SPI) compatible serial bus architecture. Byte-level and page-level functions are supported. The bus signals required are a clock input (SCK) plus separate data in (SI) and data out (SO) lines. Access to the device is controlled through a Chip Select (CS) input. 

2. Features

    1. Maximum Clock: 5 MHz

    2. Low-Power CMOS Technology:

        - Write current: 5 mA at 5.5V (maximum)

        - Read current: 5 mA at 5.5V, 5 MHz

        - Standby current: 10 μA at 5.5V

    3. 1,024 x 8 through 32,768 x 8-bit Organization

    4. Byte and Page-Level Write Operations

    5. Self-Timed Erase and Write Cycles (6 ms maximum)

    6. Block Write Protection:

        - Protect none, 1/4, 1/2 or all of array

    7. Built-in Write Protection:

        - Power-on/off data protection circuitry

        - Write enable latch

        - Write-protect pin

    8. Sequential Read

    9. High Reliability:

        - Endurance: >1,000,000 erase/write cycles

        - Data retention: >200 years

        - ESD protection: >4000V

  10. Temperature Range Supported:

        - Extended (H): -40°C to +150°C

  11. RoHS Compliant

  12. Automotive AECQ-100 Qualified

3. Pin configuration

4. Pin Function

5. Package overview