| Allicdata Part #: | TSM112CDT-ND |
| Manufacturer Part#: |
TSM112CDT |
| Price: | $ 0.00 |
| Product Category: | Integrated Circuits (ICs) |
| Manufacturer: | STMicroelectronics |
| Short Description: | IC HOUSEKEEPING 3.3/5/12V 14SOIC |
| More Detail: | Supervisor 3 Channel 14-SO |
| DataSheet: | TSM112CDT Datasheet/PDF |
| Quantity: | 1000 |
| 1 +: | 0.00000 |
| Series: | -- |
| Packaging: | Tape & Reel (TR) |
| Part Status: | Obsolete |
| Type: | Multi-Voltage Supervisor |
| Number of Voltages Monitored: | 3 |
| Output: | -- |
| Reset: | -- |
| Reset Timeout: | 100 ms Minimum |
| Voltage - Threshold: | 4V, 6.1V, 14.2V |
| Operating Temperature: | 0°C ~ 70°C (TA) |
| Mounting Type: | Surface Mount |
| Package / Case: | 14-SOIC (0.154", 3.90mm Width) |
| Supplier Device Package: | 14-SO |
| Base Part Number: | TSM112 |
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The TSM112CDT is a PMIC (Power Management Integrated Circuit) - Supervisors. It is a single-channel voltage monitor for systems operating from 2.7 V to 5.5 V. Using the device, engineers can design in fail-safe protection against overvoltage, undervoltage, or brownout conditions. It provides regulated output signal and two active-low open-drain reset outputs while keeping its supply current to a low 25 uA. The device\'s push-pull output, small footprint, and low supply current make it suitable for digital monitoring of 32-bit microprocessors.
The TSM112CDT can monitor two digital supply rails. A low-voltage threshold is set during normal operation, while a higher voltage threshold pin is used to indicate an overload or overvoltage condition. In addition to the pair of reset outputs, the device also offers a chip select (CS) control to enable or disable the monitoring function. The enable/disable inhibit feature allows system designers to add flexibility to reset timing for debugging and testing purposes.
The TSM112CDT is a low-cost, low-power supervisor device for systems that run on 2.7 V to 5.5 V. It offers 48-contact TQFP and 28-contact MSOP package options, along with low power consumption (25 uA). The device supports two power supply rails, one low-voltage digital input, and two active-low open-drain reset outputs. The TSM112CDT monitors power up/power down conditions and can provide a regulated reset without the need for an external capacitor. The device’s low sleep current and push-pull output make it an ideal choice for a variety of systems that require fail-safe protection.
The device has an auto-reset feature that repetitively reasserts the outputs as long as an over-/undervoltage condition remains. This feature helps prevent lockup during a fault condition or power-down sequence. The reset time is adjustable from 10 ms to 1.5 s with an external capacitor. The reset time is factory-programmed to 50 ms with no external components.
The device includes an established enable/disable pin for states of reset enable, reset active, or reset inactive. It also features an open-drain diagnostic output, and an adjustable voltage comparator for precision monitoring of a power rail to detect overvoltage and undervoltage conditions. The device is capable of supplying transistor output currents of 5 mA. The active-low outputs are refreshed during power-down and open-drain mode is selected by default.
The TSM112CDT is designed to meet the needs of microprocessor, ASIC, or other digital power management systems. This device has been developed to be reliable and cost effective. It is an ideal solution for managing overvoltage, undervoltage, or brownout conditions in systems running on 2.7 V to 5.5 V.
The specific data is subject to PDF, and the above content is for reference
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TSM112CDT Datasheet/PDF