S29GL256S10DHV023

S29GL256S10DHV023 Working Principle

The S29GL256S10DHV023 is comprised of a gate, source and drain junction as well as a floating gate. Inside the memory cell, two transistors are used in series to form a memory cell. The drain and source junctions are connected to the word line and the source voltage is set to a low voltage, the transistor will conduct current through the drain to ground in the absence of any other voltages. To ensure reliable and stable performance, the floating gate is electrically isolated from the main circuitry and acts as a capacitor. When the memory cell stores data, the voltage level is raised or lowered to store the bit depending on the technique used. The process of writing data is controlled by a state machine. As the voltage on the floating gate is changed, the transistor’s conduction level increases or decreases accordingly. Reading the data stored inside the memory cell is done by applying a read voltage to the drain junction. The application of a voltage to the floating gate alters the conduction of the transistor, and this change can be detected by measuring the voltage or current to determine the data stored in the memory cell.